The present invention relates to memory systems using a flash memory, and more particularly to a memory system which attaches importance to its service life and response performance.
Flash memories are non-volatile like read only memories (ROMs) and also semiconductor memories from and into which data is readable and writable, respectively, like random access memories (RAMs).
The flash memories have the following limitations in use which the static RAMs (SRAMs) and dynamic RAMs (DRAMs) do not have:
(1) The unit of erasure is not a bit or byte, but a sector or chip;
(2) There is a limitation in the erasure count; and
(3) Erasure and write processes take a few milliseconds.
Unexamined published Japanese Patent Application JP-A-5-27924 discloses the following method to solve the limitations (2) and (3) of the flash memory:
In an embodiment of the present invention to be described later, the use of a flash memory in which data is erasable in units of a sector is assumed. Thus, only that portion of the prior art involved in the erasure of data in units of a sector will be described next.
First, addressing is made by mapping logical addresses designated by a host computer and physical addresses in a semiconductor memory.
When an erasure command is input before a write command, data in the sector concerned is nullified and its erasure starts in the background.
When a write command is input, it is written into a sector in which data is to be written, selected previously in consideration of its erasure count from among all free sectors.
Unexamined published Japanese patent application JP-A-5-241741 discloses a method of controlling the flash memory, but does not consider erasure of data in units of a sector.
Since in the prior art a sector which is not designated by an erasure command remains unerased, the erasure count varies from sector to sector, disadvantageously. Since the situation of access is not considered, a logical address having a strong probability of being written in the future can be allocated to a sector having a larger erasure count. Thus, the erasure count varies further from sector to sector, so that the whole storage using the flash memory would have a reduced lifetime. That is, since the flash memory has an upper limit of erasure count, the lifetime of the whole memory is limited by a physical block having a larger erasure count. Thus, in order to increase the lifetime of the whole memory, the erasure counts of the respective physical blocks are required to be nearly uniform.
Since in the prior art the erasure counts of many sectors are required to be known to determine a sector in which data is to be written, which takes much time.